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Timed pushdown automata and branching vector addition systems

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dc.affiliationUniwersytet Warszawski
dc.conference.countryIslandia
dc.conference.datefinish2017-06-23
dc.conference.datestart2017-06-20
dc.conference.placeReykjavik
dc.conference.seriesIEEE Symposium on Logic in Computer Science
dc.conference.seriesIEEE Symposium on Logic in Computer Science
dc.conference.seriesshortcutLICS
dc.conference.shortcutLICS 2017
dc.conference.weblinkhttp://lics.siglog.org/lics17/
dc.contributor.authorMazowiecki, Filip
dc.contributor.authorLasota, Sławomir
dc.contributor.authorLazić, Ranko
dc.contributor.authorClemente, Lorenzo
dc.date.accessioned2024-01-26T10:53:32Z
dc.date.available2024-01-26T10:53:32Z
dc.date.issued2017
dc.description.financeNie dotyczy
dc.description.versionFINAL_AUTHOR
dc.identifier.doi10.1109/LICS.2017.8005083
dc.identifier.urihttps://repozytorium.uw.edu.pl//handle/item/123423
dc.pbn.affiliationcomputer and information sciences
dc.rightsCC-BY
dc.sciencecloudnosend
dc.subject.encomputational complexity decidability pushdown automata reachability analysis vectors addition operation automata nonemptiness decidability dense-timed pushdown automata doubly exponential time intersection operation least solutions non-emptiness one-dimensional branching vector addition systems orbit-finite timed register pushdown automata reachability union operation Automata Clocks Handheld computers Mathematical model Orbits Registers Upper bound
dc.titleTimed pushdown automata and branching vector addition systems
dc.typeJournalArticle
dspace.entity.typePublication